HalfAdder (LogiX node)
Revision as of 07:14, 8 May 2022 by DoubleStyx (talk | contribs)
HalfAdder | ||
---|---|---|
Inputs | ||
Bool | A | |
Bool | B | |
Outputs | ||
Bool | Y | |
Bool | CarryOut |
The HalfAdder node can be used to simulate the behavior of a hardware half adder circuit. It accepts two input bits and returns the addition result plus a carry-out.