HalfAdder (LogiX 노드)
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| HalfAdder | ||
|---|---|---|
 | ||
| Inputs | ||
| Bool | A | |
| Bool | B | |
| Outputs | ||
| Bool | Y | |
| Bool | CarryOut | |
The HalfAdder node can be used to simulate the behavior of a hardware half adder circuit. It accepts two input bits and returns the addition result plus a carry-out.